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SBCs for Embedded Networking: DIL/NetPC ADNP/ESC1

Please note: The DIL/NetPC ADNP/ESC1 is in an end-of-life (EOL) state. For more information about availability and the DIL/NetPC PLM (Product Lifecycle Management) please contact

The DIL/NetPC ADNP/ESC1 provides a very compact 32-bit Softcore-based low power embedded controller (Altera NIOS and MCU Peripherals in Cyclone FPGA) with TCP/IP stack and Web server for high-speed embedded networking applications. This DIL/NetPC offers the footprint of a standard 128-pin QIL (Quad-In-Line) socket with 2.54mm centers and all the hardware and software features necessary to add high-speed networking capabilities to any product design in a very flexible way. The DIL/NetPC ADNP/ESC1 is developed specifically for sub-systems, that need to be connected to 10 or 100 Mbps Ethernet-based TCP/IP networks with a very long product lifecycle.


The DIL/NetPC ADNP/ESC1 main component is the Altera EP1C6F256 Cyclone FPGA. This chip comes within a 256-pin FineLine BGA case and offers 6k logic elements for IP integration and proprietary code, 90 Kbits internal RAM, 2 PLLs, and up to 185 user I/Os. The Cyclone FPGA implements the ADNP/ESC1 MCU (MicroController Unit) with a 32-bit RISC NIOS Softcore CPU, timers, two UARTs, 20-bit parallel I/O ports, SDRAM controller, Tri-State brigde, and a SPI interface.


The DIL/NetPC ADNP/ESC1 is a Softcore-based ready-to-run full programmable 32-bit embedded networking system. The use of the ADNP/ESC1 will allow you to realize substantial time and costs savings over other chip-based approaches within your product lifecycle. Currently, there is no other 10/100 Mbps Ethernet- and TCP/IP-based embedded networking solution with a real long product lifecycle warranty on the market. There is also no faster Softcore-based Time-to-Market for your product with lower costs if 32-bit-based 10/100 Mbps Ethernet, full TCP/IP and a embedded Web server or other TCP/IP-based server software is required.

The on-board Flash memory provides storage for the ADNP/ESC1 uClinux operating system with TCP/IP stack, Telnet server, file transfer utilities and a embedded Web server as well as OEM applications and data. The Flash memory is in-system programmable over the serial interface. The ADNP/ESC1 in-system programming feature was developed for OEM application software, operating system downloads and data download and to make it easier to update the on-board Flash content in the field.

DIL/NetPC ADNP/ESC1: Key Features

  • Altera 32-bit NIOS RISC Softcore with 512 internal Registers
  • 50 MHz Operation
  • 16 MByte SDRAM Memory with 32-bit Data Path
  • 8 MByte Flash Memory with 16-bit Data Path
  • 10/100 Mbps Ethernet LAN Interface
  • Two asynchronous Serial Ports (one with Handshakes)
  • 20-bit General Purpose high-speed Parallel I/O
  • 16-bit ISA-like Expansion Bus
  • IDE Interface with CompactFlash Support (True IDE Mode)
  • Seven Interrupt Inputs
  • Four Chip Select Outputs
  • Programmable General Purpose Timers and Watchdog Timer
  • JTAG IEEE 1149.1 Test Interface
  • In-System Programming Features
  • 128-pin QIL (Quad-In-Line) Connector, 2.54mm Centers
  • 3.3 Volt Low Power Design, Supply Voltage 3.3 VDC (+- 5%)
  • Supply Current 450 mA typ. at 50 MHz
  • Size 82mm * 33mm

SSV EMBEDDED SYSTEMS. Board Level Products. File: dnp0046.htm, Last Update: 20.Jan.2012
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